评估、准则和验证
功能测试包括评估仿真行为以及将仿真数据与预期结果进行比较。您可以通过以下方式评估仿真行为:
在测试用例中使用时间和逻辑评估。
在 Test Assessment 或 Test Sequence 模块中包含
verify
语句以及其他运算符。使用 Test Sequence 模块指定一系列步骤来仿真在测组件或在测系统。使用 Test Assessment 模块来评估在测组件或在测系统的行为。使用 Model Verification 库中的模块。
您可以通过以下方式评估仿真数据:
将测试输出与基线数据进行比较,或使用等效性准则比较两个仿真的输出。
C
比较仿真数据与基线数据或比较两个仿真时使用值或时间容差。可用的容差类型包括相对容差、绝对容差、超前容差和滞后容差。超前容差和滞后容差对于数据时序不同的比较(例如不同求解器之间的比较)或者桌面上运行的模型与目标上运行的代码之间的比较非常有用。
使用自定义准则脚本处理仿真数据。
有关不同验证方法的概述,请参阅Assess Simulation and Compare Output Data。
模块
Observer Reference | Create and contain an Observer model |
Observer Port | Wirelessly link signals to use with verification |
Test Sequence | Create simulation testing scenarios, function calls, and assessments |
Test Assessment | Assess and verify behavior of system under test |
Sequence Viewer | Display messages, events, states, transitions, and functions between blocks during simulation |
Assertion | 检查信号是否为零 |
类
sltest.testmanager.Assessment | Logical or temporal assessment object (自 R2022a 起) |
sltest.testmanager.AssessmentSymbol | Symbol used in assessment (自 R2022a 起) |
sltest.testmanager.TestCase | Create or modify test case |
工具
测试管理器 | Model and code testing in different execution environments, manage test suites, and analyze and report results |
语法运算符
主题
- Assess Simulation and Compare Output Data
Assess simulation behavior and compare to expected output, use
verify
andassert
statements and run-time assessments. - Assess Temporal Logic by Using Temporal Assessments
Use temporal assessments to assess model timing and verify temporal signal logic in the System Under Test.
- Logical and Temporal Assessment Syntax
Learn about the types of logical and temporal assessments and their syntax.
- Assess Model Simulation Using verify Statements
Connect Test Assessment blocks to your model, author verify statements, and verify multiple conditions in the same time step.
- Verify Multiple Conditions at a Time
Including multiple
verify
statements in a single test step usingif
statements. - Test Sequence and Assessment Syntax
Operators and expressions used in Test Sequence and Test Assessment blocks and Stateflow® charts.
- Access Model Data Wirelessly by Using Observers
Wirelessly access signal and data information.
- Observe Messages
Observe message signals and obtain message details.
- Observe Conditional Subsystem Signals
Observe signals in conditional subsystems.
- Observe Internal Variables of an FMU
Use an observer to access internal variables of an FMU.
- Set Signal Tolerances
Specify value and time tolerances for baseline and equivalence criteria.