LTE HDL Toolbox™ provides sample-based algorithms in Simulink® blocks for design and implementation of LTE wireless communications subsystems on FPGAs and ASICs. Toolbox algorithms, gateways between frame-based and sample-based processing, and reference applications enable you to compose an LTE baseband communications subsystem in Simulink.
You can modify the reference applications for integration into your own design. HDL implementations of the toolbox algorithms are optimized for efficient resource usage and performance for prototyping or production deployment on FPGA and ASIC devices.
The toolbox algorithms are designed to generate readable, synthesizable code in VHDL® and Verilog® (with HDL Coder™). For over-the-air testing of LTE designs, you can connect transmitter and receiver models to radio devices (with Communications System Toolbox™ hardware support packages).