From the series: Design and Verify Signal Processing and Communications Systems
Arvind Ananthan, MathWorks
Recorded: 23 June 2009
Part 1 Modeling and Simulation As you develop complex signal processing algorithms and systems, how do you verify that your design works as intended in context with the entire system?
Part 2 HDL Functional Verification In this webinar we will explore how the EDA Simulator Links allow MATLAB or Simulink and your HDL Simulator to work together to create a better debug and verification environment to improve your product quality and shorten your development time. Thro
Part 3 DSP Early Software Verification This webinar is the third of a three-part series that demonstrates how you can reduce verification time by eliminating design flaws earlier in your development process. In this webinar we will introduce the following MathWorks DSP verification produc